An electronic circuit in a semiconductor chip or die commonly undergoes many modifications during its various design, characterization, testing and/or manufacturing phases. Some modifications are significant changes to the circuit design, but others may involve simple tweaking or trimming of various characteristics within the circuit. Such characteristics are typically, but not necessarily, analog parameters, such as a voltage level at a particular node, a period of a timer, a frequency of a signal or any other measurable parameter of any part of the circuit. The trimming generally adds to or subtracts from the value of any of the measured parameters in order to ensure that the electronic circuit, or a portion thereof, operates according to its required or stated specifications.
In many cases, the values of the measured parameters are highly dependent on the manufacturing processes used to fabricate the semiconductor chip. No semiconductor manufacturing process is 100% guaranteed to generate structures exactly the same in every semiconductor chip. Some variation is expected, and some level of tolerance is generally allowed. In general, a resistance, capacitance, inductance, voltage, current or other property at one or more locations within the semiconductor chip is trimmed in order to ensure that the measured parameters are within an allowable tolerance.
The trimming is commonly done with a series of bits, known as a trim code, that connect to a desired location or node within the electronic circuit to alter the physical characteristics of the circuit at that location. One or more such trim codes are typically taken into consideration during almost all phases of a product, from the initial design phase to production of marketable products. The necessary circuit components for applying the trim codes to the desired locations within the circuit are usually included in the initial design.
The values for the trim codes (e.g. a high or low voltage on each trim bit) are initially determined during design and characterization of the electronic circuit using computer model simulations. The determined trim code is then hardwired into the design as a “default trim code” that should enable the semiconductor chip to be at least nominally operational when it comes off the fabrication line, so that the test, characterization or production engineers (or other people who initially receive the completed semiconductor chips) at least have a functional starting point from which they can determine a better trim code. Further testing of the semiconductor chip (whether in a wafer form, a singulated die or a fully packaged IC) generally enables fine tuning of the trim code and leads to the determination of a final trim code that may be used to override the default trim code to result in a fully and properly functioning electronic circuit. Additionally, sometimes the testing of the semiconductor chip enables the design of the electronic circuit to be changed to update the default trim code by changing the circuit components for applying the trim codes, so that it isn't always necessary to override the default trim code for every produced semiconductor chip.
An example of a prior art trim control circuit 100 for use in a semiconductor chip is shown in FIG. 1. The prior art trim control circuit 100 illustrates a prior art technique of forming the default trim code and eventually overriding the default trim code with a final trim code, if necessary. The trim control circuit 100 generally includes a shift register 101, a “test trim data register” 102, a set of multiplexors 103 and a set of inverters and buffers 104. Upon power-up of the semiconductor chip, registers 105 within the shift register 101 are loaded with a programmable trim code through an “IN” node 106 from any suitable programmable memory component, such as an eFUSE. Under control of a programmable “test trim enable” bit 107 (from the test trim data register 102), the set of multiplexors 103 selects either the programmable trim code from the shift register 101 or a programmable “test trim code” 108 from the test trim data register 102 to be passed through to the set of inverters and buffers 104. The output of the set of inverters and buffers 104 is an “output trim code” that is provided to a desired location or node within the electronic circuit of the semiconductor chip.
When the semiconductor chip is initially powered on, e.g. during testing or regular operation, the registers 105 are cleared and the test trim enable bit 107 is set to “disable.” In this situation, the set of multiplexors 103 output all zero bits, some of which are inverted, depending on whether they pass through an inverter 109 or a buffer 110 (in the set of inverters and buffers 104), before being produced as the output trim code. The set of inverters and buffers 104, therefore, generally forms the default trim code when the inputs provided thereto are all zero bits.
After the semiconductor chip is fabricated, it is typically tested to determine whether it operates within its specifications. If it passes this test, then the default trim code is evidently appropriate. If it fails, however, then the semiconductor chip may still be made to operate within its specifications by overriding the default trim code with a different trim code. To determine a proper trim code, a trim code search may be performed using the test trim data register 102.
To perform a trim code search, the test trim data register 102 is loaded through an I/O port (e.g. test pads on a wafer or unpackaged die, I/O pins on a packaged die, etc.) with test values for the test trim code 108, and the test trim enable bit 107 is enabled. The set of multiplexors 103, thus, produces the test trim code 108, some of the bits of which are inverted by the set of inverters and buffers 104.
Since the set of inverters and buffers 104 may invert some of the bits of the test trim code 108, it is typically necessary for the person performing the trim code search to know which of the bits are inverted. With this knowledge, the high or low values for the bits for the test trim code 108 can be chosen appropriately, so the trim code search can proceed in an orderly fashion to narrow in on a proper trim code. Failure to properly account for the locations of the inverters 109 can cause the trim code search to be confusing and potentially produce faulty results. If done properly, however, the trim code discovered by the search can then be loaded into the programmable memory component (e.g. by blowing an eFUSE) that supplies the programmable trim code through the IN node 106 to the shift register 101. In this manner, the default trim code is overridden by a better trim code.
In some designs, the set of inverters and buffers 104 that form the default trim code may be placed between the shifter register 101 and the set of multiplexors 103. In this case, the trim code search does not need to take into consideration the location of the inverters 109, since the test trim code 108 passes unchanged from the set of multiplexors 103 to the output trim code. However, when the trim code discovered by the trim code search is loaded into the programmable memory component (e.g. by blowing an eFUSE) that supplies the programmable trim code through the IN node 106 to the shift register 101, then the discovered trim code needs to be converted in accordance with the locations of the inverters 109, which can potentially cause confusion and a faulty override trim code if not done properly.
The trim code search can potentially represent a significant amount of time within the overall manufacturing process if the search has to be done for every semiconductor chip produced. However, a better default trim code (one that is less likely to have to be overridden) may be discovered after several trim code searches have been conducted on test or production samples of the semiconductor chips. Therefore, the time for trim code searches on subsequently produced semiconductor chips can potentially be reduced or eliminated if the design of the electronic circuit can be changed to update the default trim code to the better default trim code.
To make such changes to the default trim code, some of the inverters 109 can be changed to buffers 110 and some of the buffers 110 can be changed to inverters 109. Within the semiconductor chip, however, the semiconductor structures for the inverters 109 and the buffers 110 are typically below several other layers of materials, particularly the metal interconnect layers that electrically connect the various semiconductor devices in the chip. Changes made at that depth within the semiconductor chip layers can potentially adversely affect other semiconductor devices or other layers of materials. Time consuming additional tests or design changes may have to be done to ensure that the semiconductor chip still performs properly after making changes to the inverters 109 and the buffers 110. A change to the default trim code, therefore, is generally not to be undertaken lightly.
It is with respect to these and other background considerations that the present invention has evolved.